1. Field of the Invention
This invention relates to a satellite signal receiver apparatus and a satellite signal reception method wherein a plurality of signal waves from different artificial satellites in a global navigation satellites system (GNSS) such as, for example, the global positioning system (GPS) are received to calculate the position or the speed of the receiver apparatus itself.
2. Description of the Related Art
In a GNSS system wherein artificial satellites (hereinafter referred to simply as satellites) are utilized to measure the position of a moving body such as, for example, the GPS system, a GPS receiver is used as a satellite signal receiver apparatus. The GPS receiver has basic functions of receiving signals from four or more satellites, calculating the position of the receiver itself from the received signals and notifying a user of the position.
In the GPS system, signals from satellites are in a form spectrum spread by a spread spectrum code called C/A (Clear and Acquisition) code in the L1 band. The C/A code is a spread spectrum code which is formed from a code, for example, a Gold code, of a PN (pseudo random noise) series whose transmission signal rate (chip rate) is 1.023 MHz and whose code length is 1,023. Codes of the PN series of the C/A code differ among different satellites.
A signal from a satellite (such signal is hereinafter referred to as satellite signal) is obtained by BPSK (Binary Phase Shift Keying) modulation of a carrier whose frequency is 1,575.42 MHz with a signal obtained by spectrum spreading of data of 50 bps using the spread spectrum code.
Japanese Patent Laid-Open No. 2003-258769 discloses a GPS receiver and a receiving method for GPS satellite signals. The GPS receiver receives and demodulates such satellite signals as described above to acquire navigation data including orbit information and time information of satellites called almanac or ephemeris. The GPS receiver stores and retains the orbit information and so forth into and in a memory.
Then, the GPS receiver derives the three-dimensional position of the GPS receiver itself using simultaneous equations from the orbit information and the time information of the satellites and delay times of the signals received from the satellites. The delay times are differences between arriving time points of the received signals and the sending time points from the satellites. The reason why four signals from different satellites are required for position measurement is that, since an error exists between the time in the GPS receiver and the time in each satellite, any influence of such errors should be eliminated.
Incidentally, since a signal received from a satellite is such a BPSK modulation signal as described above, in order for a GPS receiver to receive a signal from a satellite, it is necessary to establish synchronism among a spread spectrum code, a carrier and data. In other words, synchronization is required. However, synchronization of a spread spectrum code and synchronization of a carrier cannot be performed independently of each other.
Further, a GPS receiver normally converts the carrier frequency into a frequency within several MHz so that it may perform processing using an intermediate frequency (hereinafter referred to simply as IF). A carrier of an IF includes a Doppler shift caused principally by the moving speed of the satellite and a frequency error of a local oscillator which is generated in the GPS receiver and used in frequency conversion into an IF. Due to the Doppler shift and the frequency error, the carrier frequency of the IF is unknown. Meanwhile, a synchronous point of a spread spectrum code relies upon the positional relationship between the GPS receiver and the satellite, and therefore, also the synchronous point is unknown.
If much time is taken for the synchronization of the spread spectrum code and the carrier, then the reaction of the GPS receiver is retarded, resulting in disadvantage in use.
The GPS receiver in related art uses a frequency search regarding a carrier and a spread spectrum code synchronization technique which is based on a sliding correlator+DLL (Delay Locked Loop)+Costas loop.
However, the synchronization method based on a sliding correlator+DLL+Costas loop described above is not suitable for high speed synchronism in principle. In order to make up for this, an actual receiver uses multiple channels to parallelly search for a synchronous point. Therefore, the synchronization method has a drawback that a great hardware scale is required.
In recent years, thanks to enhancement of the hardware capacity, it has become possible to perform code synchronization of a spectrum spread spectrum code at a high speed using a digital matched filter. FIG. 25 shows an example of a configuration of an apparatus which performs synchronization of a spread spectrum code by means of a digital matched filter which uses a transversal filter.
Referring to FIG. 25, the digital matched filter shown includes a shift register 1 including a number of stages equal to the number N−1 of chips of a spread spectrum code. The shift register 1 successively receives a digital signal Din received from a satellite after converted into a signal of an IF in response to a clock CLK in a unit of a data sample of the digital signal Din.
Then, the digital signal Din and outputs of registers RG1, RG2, RG3, . . . , RGNN-1 at the stages of the shift register 1 are supplied to multipliers 21, 22, 23, . . . , 2N, respectively.
Each of the multipliers 21, 22, 23, . . . , 2N is supplied with a value (+1 or −1) of a chip of a spread spectrum code from a spread signal generation section 3. In this instance, the values of the chips of the spread spectrum code are supplied in a reverse order to the multipliers 21, 22, 23, . . . , 2N in such a manner that the first chip of the spread spectrum code from the spread signal generation section 3 is supplied to the multiplier 2N and the Nth chip is supplied to the multiplier 21.
After the two inputs are multiplied by each of the multipliers 21, 22, 23, . . . , 2N, results of the multiplication are supplied to a summing section 4, by which summing arithmetic operation is performed. A result of the summing arithmetic operation from the summing section 4 is attenuated to 1/N by a level adjustment section 5 and outputted as correlation result CRout from the level adjustment section 5.
Accordingly, at a chip phase at which the digital signal Din synchronized with the spread spectrum code from the spread signal generation section 3 is fetched into the shift register 1, the correlation result CRout from the summing section 4 exhibits a peak, but at any other chip phase, the correlation result CRout exhibits a lower level. In other words, a signal having such a characteristic as illustrated in FIG. 26 is obtained as the correlation result CRout from the summing section 4.